The graphics workload has the interesting property that pipeline stages amplify the input scene representation into a large amount of intermediate data (e.g., tessellated triangles, fragments) and then reduce the intermediate results into a final image. Managing the large amount of immediate data (e.g., scheduling the pipeline to keep all intermediate on chip while maintaining good parallel work distribution) is a key challenge.
The graphics workload has the interesting property that pipeline stages amplify the input scene representation into a large amount of intermediate data (e.g., tessellated triangles, fragments) and then reduce the intermediate results into a final image. Managing the large amount of immediate data (e.g., scheduling the pipeline to keep all intermediate on chip while maintaining good parallel work distribution) is a key challenge.
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